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Granite Mountain TechnologiesGranite Mountain Technologies
Granite Mountain Technologies
  • Home
  • Technology
    • Relative Timing Technology Overview
    • Technology Primer
  • Solutions
    • Design Services
    • Physical Unclonable Functions
    • SHA-256 bitcoin ASIC
    • Network on Chip
  • Careers
  • Collaborate

We Have Big Goals

To help us accomplish those goals we need team members who bring out the best in each other, who challenge assumptions and conventional thinking, who aren't afraid to break rules that should be broken, and who are strong collaborators and independent thinkers. We are headquartered in the greater Salt Lake City area, and have both co-located and distributed workforce options. We are an equal opportunity employer.

We aren't always hiring but we are ALWAYS looking for great people!

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Job Openings

Software Engineer

The employee will develop software to automate the integration of relative timing technology into the traditional ASIC CAD tool flow. The candidate must have several years of programming experience in C++ or Objective C, as well as the use of STL and BOOST class libraries. The ability to develop algorithms, create graph walking structures, and code efficiently is required. The candidate should be familiar with Linux as a development platform, which includes experience with GNU software development tools such as valgrind for profiling and memory management validation. Familiarity with integrated circuit design, the Cadence OpenAccess database infrastructure, and the Synopsys, Cadence, and Mentor Graphics CAD tools are helpful. GUI programming experience, such as with fltk, is a plus. Experience: Preferred M.S. or greater with 4-5 years of industry experience.

Hardware Engineer

The employee may work on all aspects of relative timed circuit technology. This includes work ranging from the specification and development of small templates that can be integrated into the design flow, as well as the development of low power systems. Skill in all levels of circuit design are required, including flow tables, boolean logic, understanding of the properties of deep submicron design, process variation, circuit timing and sizing, the effects of voltage scaling, etc. The ability to transform and optimize designs to meet user specified criteria through architectural concurrency changes and circuit level modifications is essential. Primary design criteria the designer must optimize include power/energy, performance, area, test coverage, noise, timing margins, and other targets. Skill using ASIC CAD tools including the Synopsys, Cadence, and Mentor Graphics flows is required. The user should be familiar with scripting using perl and tcl. Experience with programming C++ is a plus. Experience with relative timing or asynchronous design is helpful. Experience: Preferred M.S. or greater with 4-5 years of industry experience.

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    • Granite Mountain Technologies, Inc.
    • 4001 S 700 E Ste 500, SLC, UT, 84107
    • 801-308-1122
    • info@gmt-semi.com
    • www.gmt-semi.com
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